An Analytical Universal Model for Symmetric Double Gate Junctionless Transistors

Authors N. Bora , P. Das, R. Subadar
Affiliations

Department of Electronics and Communication Engineering North Eastern Hill University (A Central University of India), Shillong, India

Е-mail [email protected]
Issue Volume 8, Year 2016, Number 2
Dates Received 22 February 2016; revised manuscript received 14 June 2016; published online 21 June 2016
Citation N. Bora, P. Das, R. Subadar, J. Nano- Electron. Phys. 8 No 2, 02003 (2016)
DOI 10.21272/jnep.8(2).02003
PACS Number(s) 85.30.Tv
Keywords Double Gate (DG) junctionless MOSFET, Drain current model (2) , Surface potential (9) , Semiconductor device modelling, Threshold voltage variation, TCAD Simulation.
Annotation An analytical surface potential based universal model for the drain current voltage characteristics of Symmetric Double gate (DG) junctionless field effect transistors is presented. This novel universal model is valid for all operating regions from depletion to inversion regions of operations. The primary conduction mechanism is governed by the bulk current where the channel becomes fully depleted in turning it off. This model has been validated by using TCAD device simulating software. The comparison shows high accuracy of the proposed model.

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