Fabrication of Low-Roughness Au/Ti/ SiO2/Si Substrates for Nanopatterning of 16-Mercapto Hexadecanoic Acid (MHA) by Dip-Pen-Nanolithography
| Authors | A. Kumar1 , P.B. Agarwal1 , S.K. Gupta1, A.K. Sharma1, D. Kumar2 , Chandra Shekhar1 |
| Affiliations | 1 Sensors and Nanotechnology Group CSIR-Central Electronics Engineering Research Institute, Pilani –333 031, India 2 Dept. of Electronics Science, Kurukshetra University, Kurukshetra-136 119, India |
| Е-mail | akumar1758@yahoo.co.in |
| Issue | Volume 4, Year 2012, Number 2 |
| Dates | Received 24 October 2011; revised manuscript received 29 May 2012; published online 04 June 2012 |
| Citation | A. Kumar, P.B. Agarwal, S.K. Gupta, et al., J. Nano-Electron. Phys. 4 No 2, 22 (2012) |
| DOI | |
| PACS Number(s) | 1.16.Nd, 68.35.Ct |
| Keywords | Atomic force microscopy (9) , Dip-pen-nanolithography, Nanopatterning (2) , Self-assembled-monolayers (2) . |
| Annotation | Silicon based low-roughness Au/Ti/SiO2/Si substrates were fabricated using standard IC fabrication processes. Evolution of surface roughness during substrate fabrication process was studied. Fabrication process steps, namely, thermal oxidation and e-beam evaporation for ultra-thin Ti(~ 5 nm)/Au(22 nm) films, were optimized to result in surface r.m.s roughness ~ 0.2 m and ~ 1.0 nm, after thermal oxidation and Ti/Au deposition steps respectively. Surface roughness was estimated by atomic force microscope (AFM) imaging and image analysis. Nano-patterning experiments using thiol based 16-MHA molecular-ink on fabricated substrates were carried out, under controlled environment conditions, by dip-pen-nanolitho-graphy (DPN) technique. Minimum line-width ~ 60 nm and circular dots radius ~ 175 nm were patterned. |
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