Prospects of III-Vs for Logic Applications
| Authors | U.P. Gomes1, Y.K. Yadav1, S. Chowdhury1, K. Ranjan1, S. Rathi1, D. Biswas2 |
| Affiliations | 1 Advanced Technology Development Center, Indian Institute of Technology Kharagpur, 721302 West Bengal, India 2 Electronic and Electrical Comm. Engg., Indian Institute of Technology Kharagpur, 721302 West Bengal, India |
| Е-mail | umesh.gomes@gmail.com |
| Issue | Volume 4, Year 2012, Number 2 |
| Dates | Received 19 October 2011; revised manuscript received 28 April 2012; published online 07 May 2012 |
| Citation | U.P. Gomes, Y.K. Yadav, S. Chowdhury, et al., J. Nano-Electron. Phys. 4 No 2, 02009 (2012) |
| DOI | |
| PACS Number(s) | 1.05.Ea, 73.61.E, 68.55.ag, 84.30.Sk |
| Keywords | CMOS (19) , III-V Materials, HEMT (4) , Logic (15) , Digital (6) . |
| Annotation | The increasing challenges for further scaling down of Si CMOS require the study of alternative channel materials. This paper highlights the significance of III-V compound semiconductor materials in order to face the looming fate of Si CMOS technology. The potential advantages of using III-Vs as channel materials for future III-V CMOS is its outstanding transport properties that have been widely accepted in high frequency RF applications. However, many significant challenges in front of III-V digital technology needs to be overcome before III-V CMOS becomes feasible for next generation high speed and low power logic applications. But it may be that this situation is changing given recent progress in the fabrication of high-mobility III-Vs based heterostructure electronic devices for logic applications to fulfill the needs towards the everyday evolving III-V CMOS technology. |
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