Energy-Conscious FPGA Design through Dynamic Voltage and Frequency Scaling for Wearable Devices

Authors D. Murali1, A.M. Sandi2
Affiliations

1GNDEC, Bidar, Visvesvaraya Technological University, 590018 Belagavi, Karnataka, India

2Department of ECE, GNDEC, Bidar, Visvesvaraya Technological University, 590018 Belagavi, Karnataka, India

Е-mail dovamurali20@gmail.com
Issue Volume 17, Year 2025, Number 2
Dates Received 12 February 2025; revised manuscript received 20 April 2025; published online 28 April 2025
Citation D. Murali, A.M. Sandi, J. Nano- Electron. Phys. 17 No 2, 02029 (2025)
DOI https://doi.org/10.21272/jnep.17(2).02029
PACS Number(s) 84.30.Jc, 88.80.ff
Keywords Energy-efficient, FPGA, Wearable devices, Approximate computing, Power consumption, Dynamic power reduction, Leakage power, Battery life extension.
Annotation

In this study, we present an energy-efficient FPGA design strategy specifically aimed at wearable devices using approximate computing techniques. Wearable devices, such as fitness trackers and health monitors, require prolonged battery life while maintaining reliable performance. Approximate computing offers a solution by allowing controlled inaccuracies in non-critical operations, significantly reducing power consumption. Our approach focuses on selectively applying approximations to arithmetic units and signal processing modules commonly used in wearable applications. Experimental results demonstrate a 30 % reduction in dynamic power and a 25 % decrease in leakage power. The impact on performance remains within an acceptable range, with a minor error margin of 3-5 %. Key applications such as heart rate monitoring, motion tracking, and step counting were assessed, demonstrating that this technique can extend battery life by 20 %, making it suitable for low-power, real-time monitoring scenarios. This design approach strikes a balance between efficiency and accuracy, providing a practical solution for power-constrained wearable technology.

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