Analysis of Crosstalk Noise Using Graphene Nanoribbon Interconnects by Changing Wire Spacing and Electron Mean Free Path

Authors S. Bhattacharya1 , S. Das2, S. Tayal1, J. Ajayan1, L.M.I. Leo Joseph1, D. Das3

1Department of Electronics and Communication Engineering, SR University, Warangal, Telangana, India

2School of VLSI Technology, Indian Institute of Engineering Science and Technology, Shibpur, India

3Department of Electronics and Communication Engineering, Assam University, Silchar, India

Issue Volume 13, Year 2021, Number 6
Dates Received 10 October 2021; revised manuscript received 16 December 2021; published online 20 December 2021
Citation S. Bhattacharya, S. Das, S. Tayal, et al., J. Nano- Electron. Phys. 13 No 6, 06031 (2021)
PACS Number(s) 81.05.Uw, 63.22.Np, 61.46.Np
Keywords Graphene nanoribbon (GNR), Mean free path (MFP), Interconnects, Temperature (46) , Crosstalk.

In this article, we study the coupling capacitance (CC) and its effects on crosstalk noise in next generation high performance on-chip nano-integrated circuits by changing wire spacing and electron mean free path (MFP) between two neighboring nets using graphene nanoribbon (GNR) interconnects. For coupling capacitance analysis, three multilayer graphene nanoribbon (MLGNR) interconnects with different wire spacing (variation between 10 to 300 nm) and different interconnect length (100, 200 and 300 (m) are considered. It is observed that a smaller separation gap between two neighboring nets shows 4-6( higher coupling capacitance compared to a larger wire spacing. In terms of mean free path (MFP), a higher MFP shows 20-34 % less coupling capacitance compared to a lower MFP. In crosstalk noise analysis, a tri-interconnect model with a driver load circuit (i.e., a CMOS inverter circuit with aggressor and victim net) is used to study the performance of GNR interconnects in terms of noise peak with different possible input combinations. It is also observed that the higher MFP of the MLGNR interconnect shows less noise peak (1.11 mV with 1200 nm MFP), whereas the lower MFP shows higher noise peak (3.65 mV with 300 nm MFP). This analysis is useful for area-efficient and noise-immune next generation high-speed integrated circuit design using GNR interconnects.

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