High Power Analysis of Surrounded Channel Junction Less Field Effect Transistor

This paper reports the high power analysis of a new type of technology namely Surrounded channel junction less field effect transistor (SCJLFET) which can be used as power semiconductor switches in various power electronics circuits. Mainly surrounded channel junction less field effect transistor (SCJLFET) is a semiconductor device without junction where the gate is placed inside the body of the device or in other words the gate is surrounded by the channel region. Such type of surrounded channel junction less field effect transistor can be used as a power semiconductor switches in various power electronics circuit’s applications. Surrounded channel junction less field effect transistor (SCJLFET) exhibits comparatively higher Ion/Ioff ratio, lower sub threshold swing and higher threshold voltage with higher DIBL than a conventional JLFETwhich can be used easily in the numerous power electronics circuits. In this paper it is presented that a new device model as surrounded channel junction less field effect transistor (SCJLFET) has been introduced in the form of power MOSFET which can be used as power semiconductor switches in various power electronics devices in both off state and on state condition at high power, high voltage and high current. The surrounded channel JLFET show higher on current compared to conventional JLFET due to increased area of cross section. The on current and off current of the new structure have been determined for different values of drain voltages, gate oxide thickness, dielectric constant of gate dielectric, doping concentration and work function. The study of the characterization of SCJLFET at high power has been introduced in this paper. The high power characteristics of SCJLFET are compared with the other conventional junction less transistor using visual Cogenda TCAD 2D simulator.