Authors | P.P. Chougule1, B. Sen2, R. Mukherjee2, P.S. Patil1, R.K. Kamat3 , T.D. Dongale1 |
Affiliations | 1 Computational Electronics and Nanoscience Research Laboratory, School of Nanoscience and Biotechnology, Shivaji University, Kolhapur- 416004 India 2 Department of Computer Science and Engineering, NIT, Durgapur-713209 India 3 Embedded System and VLSI Research Laboratory, Department of Electronics, Shivaji University, Kolhapur-416004 India |
Е-mail | tdd.snst@unishivaji.ac.in |
Issue | Volume 9, Year 2017, Number 1 |
Dates | Received 13 November 2016; revised manuscript received 07 February 2017; published online 20 February 2017 |
Citation | P.P. Chougule, B. Sen, R. Mukherjee, et al., J. Nano- Electron. Phys. 9 No 1, 01021 (2017) |
DOI | 10.21272/jnep.9(1).01021 |
PACS Number(s) | 03.67.Lx, 85.35.Be, 07.05.Tp |
Keywords | QCA (4) , Akers logical array, Processing in memory, Computer architecture. |
Annotation | Processing in Memory (PIM) is a computing paradigm that promises enormous gain in processing speed by eradicating latencies in the typical von Neumann architecture. It has gained popularity owing to its throughput by embedding storage and computation of data in a single unit. We portray implementation of Akers array architecture endowed with PIM computation using Quantum-dot Cellular Automata (QCA). We present the proof of concept of PIM with its realization in the QCA designer paradigm. We illustrate implementation of Ex-OR gate with the help of QCA based Akers Array and put forth many interesting potential possibilities. |
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