Graphene Nanoribbon Based Asymmetric Tunnel FET for Fast Switching and Low Power Applications

This research work mainly investigates the process of layering graphene material as ribbon structure at nano scale i.e. 0 – 2 nm and its outcome for asymmetric tunnel field effect transistor (TFET). Our proposed model i.e. Asymmetric Dual Gate TFET with graphene nano ribbon (ADG-GN-TFET) is designed based on modern quantum tunneling device physics approach, with hetero-structured oxide material, keeping channel length at 20 nm to perform at low power application suit-ably. Silvaco TCAD is used as software for generating the simulation results, which are further analyzed and compared with orthodox TFET models for identifying its uniqueness towards making it as a fast-switching semiconductor device. The various essential physical device parameters i.e. channel length, body thickness, oxide thickness are varied and tradeoff is applied in pursuit of better device performance. The entire simulation process is performed at 0.5 V of supply voltage. This ensures the proposed device model suitable for low power applications. The approach of layering graphene sheet can be modified according to the device model and its source, channel and drain electrode material combination at nano-scale up-to 20 nm. Turn on voltage is recorded at 0.22 V, keeping effective oxide thickness (EOT) as 2 nm. Also, the ambipolar i.e. leakage current is well controlled and best recorded as 6.86  10 – 14 A/m.