Analysis of Power Supply Voltage Drop (IR-Drop) and Propagation Delay Using Folded Graphene Nano Ribbon Interconnect (F-GNR) Interconnect

In this work, a comparative analysis is performed in terms of power supply voltage drop (IR-Drop) and propagation delay (PD) of three different graphene nanoribbon (GNR) based interconnect models i.e., vertical GNR (V-GNR), horizontal GNR (H-GNR), and folded GNR (F-GNR) for next generation high speed and low power IC design. To perform IR-Drop and delay analysis for three different interconnect models, a 10-stage cascaded CMOS inverter (i.e., 16nm PTM-HP CMOS model) is used, where each inverter is connected with three different interconnect models (i.e., V-GNR, H-GNR, and F-GNR). Each interconnect model consists of different RLC values, which are calculated using some standard mathematical model. From the above analysis, it is observed that F-GNR is showing less Peak IR-Drop (~ 200 mV @ 1st stage, ~ 215 @ 5th stage, ~ 232 @ 10th stage) compared with V-GNR (~ 210 mV @ 1st stage, ~ 224.4 @ 5th stage, ~ 256.67 @ 10th stage) and H-GNR (~ 272.33 mV @ 1st stage, ~ 277.88 @ 5th stage, ~ 282.45 @ 10th stage) at 0.4 eV Fermi energy. In terms of power consumption, F-GNR is showing less power consumption (i.e., 2.06e-005 Watt) compared with V-GNR (i.e., 3.80  10 – 5 Watt) and H-GNR (i.e., 4.08  10 – 5 Watt). In terms of propagation delay, F-GNR is showing ~2-5 times less delay in several cascaded stages (i.e., starting from the 1st stage up to the 10th stage) compared with V-GNR and H-GNR interconnect. The above analysis is useful for next-generation high-speed IC design using nano-interconnect materials.