Performance of a Double Gate Nanoscale MOSFET (DG-MOSFET) Based on Novel Channel Materials
| Authors | Rakesh Prasher , Devi Dass , Rakesh Vaid |
| Affiliations | Department of Physics & Electronics, University of Jammu, Jammu-180006 |
| Е-mail | rakeshvaid@ieee.org |
| Issue | Volume 5, Year 2013, Number 1 |
| Dates | Received 08 December 2012; revised manuscript received 26 January 2013; published online 28 March 2013 |
| Citation | Rakesh Prasher, Devi Dass, Rakesh Vaid, J. Nano- Electron. Phys. 5 No 1, 01017 (2013) |
| DOI | |
| PACS Number(s) | 85.30.De, 85.30.Tv |
| Keywords | Channel materials, Ballistic nanoscale MOSFET, Gate insulator thickness (2) , Insulator dielectric constant, Gate control parameter, Drain control parameter, Indium antimonide (2) . |
| Annotation | In this paper, we have studied a double gate nanoscale MOSFET for various channel materials using simulation approach. The device metrics considered at the nanometer scale are subthreshold swing (SS), drain induced barrier lowering (DIBL), on and off current, carrier injection velocity (vinj), etc. The channel materials studied are Silicon (Si), Germanium (Ge), Gallium Arsenide (GaAs), Zinc Oxide (ZnO), Zinc Sulfide (ZnS), Indium Arsenide (InAs), Indium Phosphide (InP) and Indium Antimonide (InSb). The results suggest that InSb and InAs materials have highest Ion and lowest Ioff values when used in the channel of the proposed MOSFET. Besides, InSb has the highest values for Ion / Ioff ratio, vinj, transconductance (gm) and improved short channel effects (SS = 59.71 and DIBL = 1.14, both are very close to ideal values). More results such as effect of quantum capacitance verses gate voltage (Vgs), drain current (Ids) vs. gate voltage and drain voltage (Vds), ratio of transconductance (gm) and drain current (Id) vs. gate voltage, average velocity vs. gate voltage and injection velocity (Vinj) for the mentioned channel materials have been investigated. Various results obtained indicate that InSb and InAs as channel material appear to be suitable for high performance logic and even low operating power requirements for future nanoscale devices as suggested by latest ITRS reports. |
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List of References |
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