Impact of Annealing on CuInSe2 Thin Films and Its Schottky Interface
| Authors | U. Parihar1 , J.R. Ray2, N. Kumar1 , R. Sachdeva1 , N. Padha1 , C.J. Panchal2 |
| Affiliations | 1 Jammu University, Department of Physics and Electronics, Ambadkar Road, 180 006, Jammu, India 2 M.S. University of Baroda, Faculty of Technology and Engineering, Vadodara, 390–009 India |
| Е-mail | nareshpadha@yahoo.com |
| Issue | Volume 3, Year 2011, Number 1, Part 5 |
| Dates | Received 04 February 2011, in final form 30 November 2011, published online 08 December 2011 |
| Citation | U. Parihar, J.R. Ray, N. Kumar, et al., J. Nano- Electron. Phys. 3 No1, 1086 (2011) |
| DOI | |
| PACS Number(s) | 85.30.De, 68.55.A – |
| Keywords | Thermal evaporation (10) , CIS thin film, Vacuum annealing, Structural (40) , Morphological (4) , Electrical characterization. |
| Annotation | The room temperature current–voltage (I-V) characteristics of the Al/p-CuInSe2 Schottky Diodes fabricated on thermally evaporated CIS thin films, before and after annealing, were studied. Prior to their diode formation, the undertaken CIS thin films were compared on the basis of structural, morphological and electrical investigations. Wherein, annealed films showed an increase in the grain size and carrier concentration values while decrease in resistivity. I-V analysis of the Schottky diodes depicted decrease in the barrier heights and increase in ideality factors of those formed on annealed films. The diodes, thus, indicated the existence of barrier inhomogenity at the M-S interface. The annealed Schottky diodes also demonstrated better ideality factor values with increased thickness of CIS layer. |
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List of References |
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