Role of Interface Charges on High-k Based Poly-Si and Metal Gate Nano-Scale MOSFETs
| Authors | N. Shashank, Vikram Singh, W.R. Taube, R.K. Nahar |
| Affiliations | Central Electronics Engineering Research Institute Council of Scientific and Industrial Research, Pilani-333031, Rajasthan, India |
| Е-mail | Shashank@ceeri.ernet.in |
| Issue | Volume 3, Year 2011, Number 1, Part 5 |
| Dates | Received 04 February 2011, published online 08 December 2011 |
| Citation | N. Shashank, Vikram Singh, W.R. Taube, R.K. Nahar, J. Nano- Electron. Phys. 3 No1, 937 (2011) |
| DOI | |
| PACS Number(s) | 85.30.Tv, 83.10.Rs |
| Keywords | MOSFET (31) , High-k (14) , Interface charges, Mobility (10) , Metal gates. |
| Annotation |
The characteristics of typical sub-100 nm high K gate dielectrics MOSFET with different gate materials are simulated by two dimensional device simulators (ATLAS and ATHENA). The impact of interface charges on the characteristics of Poly-Si and TiN metal gate MOSFETs are investigated. The simulation results shows that, at high interface charge densities, the devices with Poly-Si gate degrade much compared to metal gate MOSFET structures. Emphasis is given to study the mobility degradation which stands as a major hurdle with the implementation of high-k dielectrics in nano-scale devices. The advantages of using Watt model over other models for the extraction of channel mobility is also clearly explained. The performance of the high-k MOSFET with metal electrode and poly-silicon electrode is also compared for various interface state charges. |
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List of References |
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