| Authors | Divya1 , N. Goel1, S. Bhatia2, R.K. Yadav1 |
| Affiliations |
1Department of ECE, Raj Kumar Goel Institute of Technology Ghaziabad, Uttar Pradesh, India 2Department of Computer Science and Engineering, Galgotias University, Greater Noida, Uttar Pradesh, India |
| Е-mail | nehagfec@rkgit.edu.in |
| Issue | Volume 18, Year 2026, Number 1 |
| Dates | Received 15 December 2025; revised manuscript received 20 February 2026; published online 25 February 2026 |
| Citation | Divya, N. Goel, S. Bhatia, R.K. Yadav, J. Nano- Electron. Phys. 18 No 1, 01036 (2026) |
| DOI | https://doi.org/10.21272/jnep.18(1).01036 |
| PACS Number(s) | 85.40._e |
| Keywords | CMOS SRAMs, Sense Amplifier, Bit line, Voltage mode, Сurrent mode. |
| Annotation |
Sense amplifiers play an important role in the process of reading data stored in a memory bit. Their performance affects the power consumption and speed of the memory core. For greater performance, analysis of different sense amplifiers is necessary. The design and experimental quantitative study of a sense amplifier in voltage and current mode for SRAM is presented. This article presents a comparative analysis of research results for different sense amplifiers in voltage and current mode. The purpose of the study was to simulate a sense amplifier in voltage and current mode, as well as a comparison for analyzing the performance of parameters such as power and energy. The simulation tool is LT-spice using 180 nm technology. |
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