Single Electron Transistor Based Current Mirror: Modelling and Performance Characterization
| Authors | Ashok.D. Vidhate, Shruti Suman |
| Affiliations |
ECE Department, Koneru Lakshmaiah Education Foundation (K L University), Andhra Pradesh, India |
| Е-mail | vidhate.a.d@gmail.com |
| Issue | Volume 13, Year 2021, Number 1 |
| Dates | Received 11 January 2021; revised manuscript received 15 February 2021; published online 25 February 2021 |
| Citation | Ashok.D. Vidhate, Shruti Suman, J. Nano- Electron. Phys. 13 No 1, 01017 (2021) |
| DOI | https://doi.org/10.21272/jnep.13(1).01017 |
| PACS Number(s) | 85.30-z |
| Keywords | Self-biased current mirror, MOS current mirror, Nano-scale MOSFET, Power dissipation, CMOS integrated circuit, Amplifier, Single Electron Transistor (3) , Coulomb blockade, Cascode current mirror. |
| Annotation |
Current mirror is basic building block of amplifier, oscillator and comparator circuit. An ideal current mirror is independent of input power and temperature. The output current is constant mirrored image of input current. In order to avoid wrong equilibrium it must have high output impedance. This can be achieved by using super cascode formation. The single electron coulomb blockade structure provides low voltage operation and scaling of transistor to 10 nm. The Single Electron Transistor (SET) based CM is modeled and analyzed by simulation and the results shows improved performance of CM. |
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List of References |
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