Synthesis of Cerium Dioxide High-k Thin Films as a Gate Dielectric in MOS Capacitor

Автор(ы) Anil G. Khairnar, Y.S. Mhaisagar , A.M. Mahajan
Принадлежность Department of Electronics, North Maharashtra University Jalgaon, 425001, Maharashtra, India
Е-mail ammahajan@nmu.ac.in
Выпуск Том 5, Год 2013, Номер 3
Даты Получено 24.12.2012; в отредактированной форме - 04.07.2013; опубликовано online 12.07.2013
Ссылка Anil G. Khairnar, Y.S. Mhaisagar, A.M. Mahajan, J. Nano- Electron. Phys. 5 No 3, 03002 (2013)
DOI
PACS Number(s) 77.55. + f, 81.20.Fw, 68.37, Hk, 85.30.Tv, 84.37. + q.
Ключевые слова High-k (8) , CeO2, Gate dielectric (5) , Sol-gel (15) , XRD (61) , FTIR (22) .
Аннотация In the present study, the Al/CeO2 / p-Si MOS capacitor was fabricated by depositing the Aluminium (Al) metal layer by thermal evaporation technique on sol-gel derived CeO2 high-k thin films on p-Si substrate. The deposited CeO2 films were characterized by Ellipsometer to study the refractive index that is determined to be 3.62. The FTIR analysis was carried out to obtain chemical bonding characteristics. Capacitance-voltage measurements of Al/CeO2 /p-Si MOS capacitor were carried out to determine the dielectric constant, equivalent oxide thickness (EOT) and flat band shift (VFB) for the deposited CeO2 film of 16.22, 1.62 nm and 0.7 V respectively. The conductance voltage curve was used to determine the interface trap density (Dit) at the CeO2 / p-Si interface that is calculated to be 1.29 × 1013 cm – 2 eV – 1 for measurement frequency of 500 kHz.

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