Small Signal Parameter Extraction of III-V Heterojunction Surrounding Gate Tunnel Field Effect Transistor

Author(s) Manjula Vijh1,2 , R.S. Gupta3 , Sujata Pandey4
Affiliations

1 Amity University Uttar Pradesh, Noida, India

2 Amity School of Engineering and Technology, New Delhi, India

3 Maharaja Agrasen Institute of Technology, New Delhi, India

4 Amity Institute of Telecom Engineering and Management, Amity University Uttar Pradesh, Noida, India

Е-mail mvijh@amity.edu, spandey@amity.edu
Issue Volume 9, Year 2017, Number 4
Dates Received 18 April 2017; revised manuscript received 25 July 2017; published online 27 July 2017
Citation Manjula Vijh, R.S. Gupta, Sujata Pandey, J. Nano- Electron. Phys. 9 No 4, 04004 (2017)
DOI 10.21272/jnep.9(4).04004
PACS Number(s) 67.72.uj, 61.82.Fk, 71.55.Eq,85.30.De
Key words Gate All Around Tunnel FET, Heterojunction (4) , Small signal parameters, Broken-gap (2) .
Annotation This work presents simulation study and analysis of nanoscale III-V Heterojunction Gate All Around Tunnel Field Effect Transistor, along with the extraction of small signal parameters of the device. Transfer characteristics and output characteristics of the device were observed. The device is simulated for extraction of small signal parameters such as transconductance, gate-source capacitance, gate-drain capacitance, by varying doping concentration of drain region and channel length. Cut-off frequency of the device is also obtained. The results reported agree well with the data available in literature.

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