Results (16):

Title Effects of Interfacial Charges on Doped and Undoped HfOx Stack Layer with Tin Metal Gate Electrode for Nano-Scaled CMOS Generation
Author(s) S. Chatterjee, Y. Kuo
Issue Volume 3, Year 2011, Number 1, Part 1
Pages 0162 - 0169
Title Effect of Grain Size on the Threshold Voltage for Double-Gate Polycrystaline Silicon MOSFET
Author(s) Mahesh Chandra, Alka Panwar, B.P. Tyag
Issue Volume 3, Year 2011, Number 1, Part 3
Pages 0474 - 0478
Title Two Dimensional Analytical Modeling for SOI and SON MOSFET and Their Performance Comparison
Author(s) Saptarsi Ghosh, Khomdram Jolson Singh, Sanjay Deb, Subir Kumar Sarkar
Issue Volume 3, Year 2011, Number 1, Part 3
Pages 0569 - 0575
Title Two-Dimensional Analytical Modeling of Threshold Voltage of Doped Short-Channel Triple-Material Double-Gate (Tm-Dg) MOSFET's
Author(s) Sarvesh Dubey, Dheeraj Gupta, Pramod Kumar Tiwari, S. Jit
Issue Volume 3, Year 2011, Number 1, Part 3
Pages 0576 - 0583
Title Strategic Review of Arsenide, Phosphide and Nitride MOSFETs
Author(s) Gourab Dutta, Palash Das, Partha Mukherjee, Dhrubes Biswas
Issue Volume 3, Year 2011, Number 1, Part 4
Pages 0728 - 0740
Title Electrostatics of Silicon Nano Transistor
Author(s) Lalit Singh, B.P. Tyag
Issue Volume 3, Year 2011, Number 1, Part 4
Pages 0808 - 0813
Title A 2-D Analytical Threshold Voltage Model for Symmetric Double Gate MOSFET's Using Green’s Function
Author(s) Anoop Garg, S.N. Sinha, R.P. Agarwal
Issue Volume 3, Year 2011, Number 1, Part 5
Pages 0894 - 0902
Title Role of Interface Charges on High-k Based Poly-Si and Metal Gate Nano-Scale MOSFETs
Author(s) N. Shashank, Vikram Singh, W.R. Taube, R.K. Nahar
Issue Volume 3, Year 2011, Number 1, Part 5
Pages 0937 - 0941
Title A Doping Dependent Threshold Voltage Model of Uniformly Doped Short-Channel Symmetric Double-Gate (DG) MOSFET’s
Author(s) P.K. Tiwari, S. Dubey, S. Jit
Issue Volume 3, Year 2011, Number 1, Part 5
Pages 0963 - 0971
Title Effect of Drift Region Doping and Coulmn Thickness Variations in a Super Junction Power MOSFET: a 2-D Simulation Study
Author(s) Deepti Sharma, Rakesh Vaid
Issue Volume 3, Year 2011, Number 1, Part 5
Pages 1112 - 1119
Title Performance of a Double Gate Nanoscale MOSFET (DG-MOSFET) Based on Novel Channel Materials
Author(s) Rakesh Prasher, Devi Dass, Rakesh Vaid
Issue Volume 5, Year 2013, Number 1
Pages 01017-1 - 01017-5
Title Comparison of Atomic Level Simulation Studies of MOSFETs Containing Silica and Lantana Nanooxide Layers
Author(s) K. Bikshalu, M.V. Manasa, V.S.K. Reddy, P.C.S. Reddy, K. Venkateswara Rao
Issue Volume 5, Year 2013, Number 4
Pages 04058-1 - 04058-3
Title Analysis of Voltage Transfer Characteristics of Nano-scale SOI CMOS Inverter with Variable Channel Length and Doping Concentration
Author(s) A. Daniyel Raj, C. Rajarajachozhan, Sanjoy Deb
Issue Volume 7, Year 2015, Number 1
Pages 01004-1 - 01004-4
Title An Analytical Universal Model for Symmetric Double Gate Junctionless Transistors
Author(s) N. Bora, P. Das, R. Subadar
Issue Volume 8, Year 2016, Number 2
Pages 02003-1 - 02003-4
Title Effects of High-k Dielectrics with Metal Gate for Electrical Characteristics of SOI TRI-GATE FinFET Transistor
Author(s) Fatima Zohra Rahou, A.Guen Bouazza, B. Bouazza
Issue Volume 8, Year 2016, Number 4
Pages 04037-1 - 04037-4
Title Comparative Analysis of CNTFET and CMOS Logic based Arithmetic Logic Unit
Author(s) K. Nehru, T. Nagarjuna, , G. Vijay,
Issue Volume 9, Year 2017, Number 4
Pages 04018-1 - 04018-4